Semi-Conductor Chip Protection

I. Introduction

Semi-conductors commonly known as chips or micro-chips are needed for data processing in equipment such as laptop, PC, servers etc. The name ‘Semi-conductor’ comes from the type of material used in such devices². Materials such as Silicon conduct electricity under certain conditions i.e. they can change their status as carriers of electricity. This makes them hold a place between insulators and conductors³. This property is what makes semi-conductor materials a good media to control electrical current as it allows semi-conductor devices to switch, amplify and convert electrical current⁴. It could be stated that micro-processors consist of a large number of Integrated Circuits (Herein after, IC) i.e. bundles of linked transistors on a chip. The ICs are printed on silicon dies. The ICs are put on water where there are specifically created patterns called masks⁵. The Three-dimensional deposition of the pattern defines the structure of the circuit and is called the layout design or topography⁶.

Research Methodology:

The Research Methodology is in the form of doctrinal Research, wherein the Secondary Sources used to collect information is through research papers, journals, research articles, insurance law books, Newspaper and other Online resources. This paper is strictly limited to the theoretical underpinning as regards the present topic.

Research Objectives:

ICs are constructed from a small number of traditionally discrete circuit elements they are the resistors, transistors and capacitors. In the IC each of these components are formed from layers of different semi-conductor materials⁷. The resulting elements are interconnected and this is according to a particular design represented by holes and channels in each layer of the IC⁸. The author Firstly, wishes to establish how this technology is easily subject to piracy, Secondly the author would establish the protection regime which is in existence. Finally, the author would study the Indian Regime and to obtain a perspective on the working of the law and the IP available to protect semi-conductor chips and prevent piracy.

II. The beginning of an ic protection regime

Semi-conductor innovation coincided with the intense use of patents. The Patent strategies varied depending upon the phases of development and country. There was notable growth in registering industrial layout design from the early 1950’s. The IP strategy in the US semiconductor Industry saw notable change in the mid-1960’s when Fairchild and Texas Instruments sued each other for patent infringement⁹. The 1966 settlement, reached was that each party dropped its opposition and agreed not to dispute the rival’s patents for a period of ten years. The balance of power between these two companies’ major players then allowed for disseminating the technology¹⁰. Patent Court Proceeding w.r.t IC started in 1973 and increased from 1983.

Chip Piracy

A person who replicates a developed integrated layout and sells to gain unlawful profits is known as a ‘chip pirate’¹¹. In the digital age the piracy of chips is an effortless technique. The US faced a threat from the Japanese when it came to replicating semi-conductor layout designs. This was popularly known as the ‘Japanese threat’¹². It came into further media scrutiny when there was a dispute as regards a Toshiba Chip being the replica of that of Intel’s. However, these ships were different in the sense Toshiba produced a smaller chip in a double metal process where the transistor patterns were organized in vertical columns. The Intel Chip was bigger and had its transistors produced in a single metal process¹³. Thus, the 1984 Semi-conductor Chip Protection Act was introduced¹⁴. The object of protection was the mask-work. The Mask is the pattern used to create the IC. The mask-work needed to be original. The SCPA built on the notion of reciprocity¹⁵. All nations were required to adopt the main elements of the SCPA. Otherwise, topographies and mask work of a foreign chip producer would not be protected in the US.

III. The components and the procedure behind an IC

An Integrated Circuit consists of three layers, one is made of semi-conductor material. A wafer of semiconductor material is coated with a layer of silicon oxide and the electronic components such as the transistor and resistors are formed by a process entailing diffusion i.e. ‘chemically doping the semi-conductor material with impurities with holes which have been etched through the oxide’. An aluminium coating is applied which is partly then evaporated using a mask¹⁶. This leaves behind the interconnections between components formed in the semiconductor layer. Thus, a comment can be made that ‘the information highway is paved with silicon.’

The mask is transparent but has opaque patterns which correspond to the patterns which need to be etched onto the wafer. In certain complex circuits there is another layer of silicon placed on the etched wafer and the etching process could be repeated¹⁷. A typical chip has eight to twelve layers. Each layer has a unique mask which creates the circuit. The layer of masks is called as mask work or the layout design, and manifests in the three-dimensional layout of the chip. It is the three-dimensional organization that required protection from piracy.

When more advanced chip manufacturing systems are considered the physical mask is dispensed with a controlled light beam to the semiconductor material which traces out a mask for each layer of the chip¹⁸. So, in present scenario mask are read in conformity to the information stored when a controlled light beam is used, and also the more conventional photographic type of physical masks.

IV. Chip piracy and need for protection

The layout design of an integrated circuit are creations of human thought and scientific breakthrough¹⁹. It takes a lot of investment of both time and money to create new layout designs. But it can be easily replicated by a chip pirate in a few months by removing the chips plastic casing and photographing each layer of the translucent silicon material, and this is done at a fraction of the original cost²⁰.

By the 1999s in India the legal framework afforded to chip protection namely the copyright. Patent or Industrial design did not offer adequate protection to layout designs. The problem with copyright protection was that layout designs demanded more stringent protection than that was offered under copyright protection²¹. The copyright act is too general to accommodate the original ideas of scientific creation of the layout designs. The masks and the design drawing could have benefited from the copyright act but the benefit of the finished product from copyright protection was unclear²². For instance, copyright in an architectural plan does not prevent anyone from building the house represented in the plan, copyright in technical drawing representing a chip design does not protect against unauthorized duplication of the chip. Secondly when it came to patenting layout designs it should be noted that patents needed to be novel and non-obvious and this high standard of inventiveness requirement for patentable articles is rarely achieved in the spatial organization of commonly known circuit elements. Thus, the work involved in chip manufacturing was more of a developmental process rather than an incentive process, which would qualify for patent²³. Thirdly, layout designs of integrated circuits are not industrial designs as they do not determine the external appearance of integrated circuits²⁴. But they determine the physical location in the IC where each of the element is placed which has an electronic function. The need for sui generis protection was felt in India.

Thus, the Semi-Conductor Integrated Circuit Layout Design Act, 2000 was introduced²⁵. The Act protects original and inherently distinctive layout designs which have not been previously ‘commercially exploited’ and the ‘registration of such layout designs is a pre-requisite for protection’. A layout design is original if it is ‘not merely a copy of all or a substantial part of another layout design and is the result of a creator’s own intellectual effort’²⁶.

V. The indian regime

The First sole protection to Semi-Conductor Chips was given in the US through Semi-Conductor Chip Protection Act in 1984. The impact of this enactment was felt throughout the world. Japan then followed with a similar enactment called the Japanese Circuit Layout Right Act²⁷. Then followed the EC Directive which was on the implementation of legislation in all Member States of the EU which accelerated International efforts and resulted in the formulation of the 1989 Treaty on Intellectual Property in Respect of Integrated Circuits (Hereinafter, IPIC Treaty) under the auspice of the WIPO²⁸. This treaty was later made a part of the TRIPS Agreement. TRIPs made it mandatory for adherence to the substantive provisions of the IPIC Treaty. India as a member of the TRIPS Agreement enacted the Semi-Conductor Integrated Circuit Layout Design Act, 2000²⁹. The implementation of this act was under the Ministry of Communication & Information Technology. It made it compulsory for lay-out designs to be registered and to thereby receive protection under this Act.

VI. Subject matter of protection

The 2000 Enactment offers protection to the layout design of a semi-conductor integrated circuit. The protection is given to the layout design itself so that design houses producing layout-designs can have protection for their products separate from their incorporation in a chip product³⁰. This different from the protection offered in the USA, where a mask work is not eligible for protection unless and until it is fixed in a semi-conductor chip product. A mask work can be called ‘fixed’ according to Section 901 (a) (3) of the SCPA if it is found in a semi-conductor chip product i.e. ‘when its embodiment in the product is sufficiently permanent or stable to permit the mask work to be perceived or reproduced from the product for a period of more than transitory duration.’³¹ A mask work is usually fixed in a semi-conductor chip product once the chip has been manufactured.

Under Article 2 (ii) of the IPIC Treaty Layout Design has been defined as the ‘three-dimensional deposition, however expressed, of the elements, at least one of which is an active element, and of some or all of the interconnections of an integrated circuit, or such a three-dimensional deposition prepared for an integrated circuit intended for manufacture.’ It is clear from this definition that there is no need for the layout design to be implemented in a physical form to register and this is evident from the words in the definition, ‘or such a three-dimensional deposition prepared for an integrated circuit intended for manufacture.’ This intention is clearly expressed by the Indian Legislature while it was drafting the 2000 Enactment.

Section 17 of the Act states that the rights conferred by the registration of a layout design must be available to the registered-proprietor irrespective of the fact whether the layout-design was incorporated in an article. India is a member of the TRIPS Agreement and this ensures its adherence to Article 2 – 7 with the exception of Article 6 (3) of the IPIC Treaty³². There are special design houses which prepare the layout design for an Application Specific Integrated Circuit (Hereinafter, ASIC); for a particular customer the topography could be implemented in a separate semi-conductor foundry³³. Thus, the layout-design needs to be protected especially at this stage, and not after it has been incorporated in a semi-conductor chip product.

The 2000 Enactments offers protection once the layout-design has been registered. Layout-designs are registered if they are “(i) Original, (ii) inherently distinctive, (iii) capable of being distinguishable from any other registered layout-design and (iv) if they have not been commercially exploited for more than two years before date of application for registration”.³⁴ Thus, it is observed that the act requires distinction rather than novelty for the purpose of registration.

A layout-design is a combination of elements and interconnection that are commonly known amongst creator of layout-designs and manufacturers of semi-conductor integrated circuits. The layout-designs and thereby only considered original if the combination is a result of the creators own intellectual abilities and efforts³⁵. The 2000 Enactment recognizes the fact that layout designs will contain elements which are already existing or protected in the semiconductor industry, and also it should be noted that new compilation of well-known elements are oft sought for registration. In the case of Ocular Sciences Ltd. v. Aspect Vision Care³⁶, the meaning of ‘common place’ was discussed wherein it was held that ‘when it comes to protection a combination must not itself be commonplace, and this should be possible even if the constituent parts are trivial or mundane.’

Thus, it is notable that the 2000 Enactment expressly provides for ‘creators own intellectual effort’ and that layout-designs should not be commonplace among the creators of layout designs and semi-conductor chip manufacturers³⁷. The combination of elements cannot be original but a new topography can be a result of the combination of ‘commonplace elements’ in a way they were not combines earlier³⁸. The new layout-design needs to have some dissimilarity to the features which are present in well-known semiconductor products.

VII. Duration of protection

The Protection offered by the 2000 Act, commences from the date of application for registration in the case of layout designs, which have not been commercially exploited. For those designs which have been commercially exploited for less than two years before the date of application for registration, protection commences retrospectively from the date of first commercial exploitation³⁹. But irrespective of when the duration of protection can be calculated from the rights can only be enforced after registration. For Instance, a chip which was released in the market for commercial exploitation in April 2009 and registered in December 2010 the protection would commence from April 2009 for a period up to ten years i.e. April 2019⁴⁰. Once Registered the proprietor can claim damages not only for the infringement of his rights which occurred after December 2010 but also those that occurred from April 2009.

VIII. Enforcement of exclusive rights, suggestions & a brief commentary

The 2000 Act lays down express provisions affording criminal remedies for infringement of layout designs. The Act does not provide expressly for civil remedies like the other IP laws nor does it bar civil remedies⁴¹. Section 16 of the Act refers to ‘damages’ wherein it states that ‘no person shall be entitled to institute any proceeding to prevent, or to recover damages for, the infringement of an unregistered layout design.’ Civil Remedies such as injunctions, accounts of profits and damages are enforceable rights under the 2000 Enactment as is in the case of patents copyrights etc.⁴² A suggestion from the author is that more express provisions when it comes civil remedies could have been incorporated under the act to prevent any kind confusion.

As already stated, the 2000 enactment for protection of semi-conductor topography is different from the law of patents and designs in India as it protects the registered proprietor in the sense that the proprotor has criminal remedies for the infringement of a layout design⁴³. Wilful infringers shall be punishable up to three years or a fine between fifty thousand and ten lakh rupees⁴⁴. The registered-proprietor can submit a written complaint to the Court of Judicial Magistrate First Class if there is an infringement and the Magistrate can then take cognizance of the offence. The court may order forfeiture to government of goods related to the offence or the same to be destroyed when there is a conviction⁴⁵.

The Indian Act is different from the existing laws on Semi-Conductor Protection. The usefulness in providing criminal sanctions comes from the fact that prevention of infringement of layout designs is in the interest of the general public. Criminal Sanction in this instance acts as a deterrent⁴⁶. The Act also exempts the liability from innocent purchasers who infringe chip products when it comes to importation or distribution of these products before they had the notice of such layout-design protection⁴⁷. It further allows protection to innocent purchasers who receive the notice of infringement to import or distribute the chip products purchased before they had notice; however, they need to pay a reasonable royalty to the proprietor of the lay-out design⁴⁸.

IX. Conclusion

The 2000 Enactment came to fulfil India’s obligation under the TRIPS Agreement and the Act is in cognizance of the TRIPS norms. The government initiative to protect in IC will come as a strategy to build confidence in the industry and global investing community⁴⁹. The Act performs well in comparison to other enactments when it comes to the important aspect, it is at time even better for instance the requirement of inherent distinctiveness and the provision of criminal remedies for infringement makes it a superior legislation⁵⁰. The IP regime in India before this Act came into force as explained by the author did not fully cater to layout designs leaving chip developers with insufficient protection⁵¹. Sui Generis protection will go a long way in protecting the industry and also the consumers of chip products, it will also attract more players in the chip industry and help maintain healthy competition. This would translate to competitive pricing. India is an emerging player in the Multi-Billion Dollar Global semi-conductor industry. Indian companies have entered into substantial projects in the area of chip design. And thus, the framework of protection is extremely important⁵². Also, the fact that India is a developing country and the government needs to use foresight to plan and institute the right policies⁵³. The TRIPS oblige a high level of IP protection and India is a member to the TRIPS Agreement, this could ensure that secure environment to encourage such innovative activity such as creating semi-conductor chips.

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